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Final Electrical Specifications
LT1506 4.5A, 500kHz Step-Down Switching Regulator
June 1998
FEATURES
s s s s s s s s
DESCRIPTION
The LT (R)1506 is a 500kHz monolithic buck mode switching regulator functionally identical to the LT1374 but optimized for lower input voltage applications. It will operate over a 4V to 15V input range compared with 5.5V to 25V for the LT1374. A 4.5A switch is included on the die along with all the necessary oscillator, control and logic circuitry. High switching frequency allows a considerable reduction in the size of external components. The topology is current mode for fast transient response and good loop stability. Both fixed output voltage and adjustable parts are available. A special high speed bipolar process and new design techniques achieve high efficiency at high switching frequency. Efficiency is maintained over a wide output current range by keeping quiescent supply current to 4mA and by utilizing a supply boost capacitor to saturate the power switch. The LT1506 fits into standard 7-pin DD and fused lead SO-8 packages. Full cycle-by-cycle short-circuit protection and thermal shutdown are provided. Standard surface mount external parts are used, including the inductor and capacitors. There is the optional function of shutdown or synchronization. A shutdown signal reduces supply current to 20A. Synchronization allows an external logic level signal to increase the internal oscillator from 580kHz to 1MHz.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Constant 500kHz Switching Frequency Easily Synchronizable Operates with Input as Low as 4V Uses All Surface Mount Components Inductor Size Reduced to 1.8H Saturating Switch Design: 0.07 Shutdown Current: 20A Cycle-by-Cycle Current Limiting
APPLICATIONS
s s s s
Portable Computers Battery-Powered Systems Battery Charger Distributed Power
TYPICAL APPLICATION
5V to 3.3V Down Converter
D2 1N914 C2 0.68F INPUT 5V BOOST VIN VSW LT1506-3.3 SHDN GND SENSE VC CC 1.5nF D1 MBRS330T3 L1 5H OUTPUT 3.3V 4A
EFFICIENCY (%)
90 VOUT = 3.3V VIN = 5V L = 10H 85
80
C3 10F TO 50F CERAMIC
+
OPEN OR HIGH = ON
75
+
C1 100F, 10V SOLID TANTALUM
1506 TA01
70 0 0.5 1.0 1.5 2.0 2.5 3.0 LOAD CURRENT (A) 3.5 4.0
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Efficiency vs Load Current
1506 TA02
1
LT1506
ABSOLUTE MAXIMUM RATINGS
Input Voltage .......................................................... 16V BOOST Pin Above Input Voltage ............................. 15V SHDN Pin Voltage ..................................................... 7V FB Pin Voltage (Adjustable Part) ............................ 3.5V FB Pin Current (Adjustable Part) ............................ 1mA Sense Voltage (Fixed 3.3V Part) ............................... 5V SYNC Pin Voltage ..................................................... 7V Operating Junction Temperature Range LT1506C ............................................... 0C to 125 C LT1506I ........................................... - 40C to 125C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
PACKAGE/ORDER INFORMATION
FRONT VIEW 7 6 5 4 3 2 1 FB OR SENSE* BOOST VIN GND VSW SYNC OR SHDN* VC
ORDER PART NUMBER LT1506CR LT1506CR-3.3 LT1506CR-SYNC LT1506CR-3.3 SYNC LT1506IR LT1506IR-3.3 LT1506IR-SYNC LT1506IR-3.3 SYNC
VIN 1 BOOST 2 FB OR 3 SENSE* GND** 4
TAB IS GND
R PACKAGE 7-LEAD PLASTIC DD PAK
TJMAX = 125C, JA = 30C/W WITH PACKAGE SOLDERED TO 0.5 SQUARE INCH COPPER AREA OVER BACKSIDE GROUND PLANE OR INTERNAL POWER PLANE. JA CAN VARY FROM 20C/W TO > 40C/W DEPENDING ON MOUNTING TECHNIQUES
*Default is the adjustable output voltage device with FB pin and shutdown function. Option -3.3 replaces FB with SENSE pin for fixed 3.3V output applications. -SYNC replaces SHDN with SYNC pin for applications requiring synchronization. Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
TJ = 25C, VIN = 5V, VC = 1.5V, Boost = VIN + 5V, switch open, unless otherwise noted.
PARAMETER Feedback Voltage (Adjustable) Sense Voltage (Fixed 3.3V) All Conditions SENSE Pin Resistance Reference Voltage Line Regulation Feedback Input Bias Current Error Amplifier Voltage Gain Error Amplifier Transconductance VC Pin to Switch Current Transconductance Error Amplifier Source Current Error Amplifier Sink Current VC Pin Switching Threshold VC Pin High Clamp Switch Current Limit Slope Compensation 4.3V VIN 15V
q q
CONDITIONS All Conditions
q
(Notes 1, 7) I (VC) = 10A (Note 7)
q
VFB = 2.1V or VSENSE = 2.9V VFB = 2.7V or VSENSE = 3.7V Duty Cycle = 0 VC Open, VFB = 2.1V or VSENSE = 2.9V, DC 50% DC = 80%
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TOP VIEW 8 VSW 7 SYNC 6 SHDN 5 VC
ORDER PART NUMBER LT1506CS8 LT1506CS8-3.3 LT1506IS8 LT1506IS8-3.3 S8 PART MARKING 1506 150633 1506I 506I33
S8 PACKAGE 8-LEAD PLASTIC SO
JA = 80C/ W **WITH FUSED (GND) GROUND PIN CONNECTED TO GROUND PLANE OR LARGE LANDS
MIN 2.39 2.36 3.25 3.23 4
TYP 2.42 3.3 6.6 0.01 0.5 400 2000 5.3 225 225 0.9 2.1 6 0.8
MAX 2.45 2.48 3.35 3.37 9.5 0.03 2 2700 3100 320 320
UNITS V V V V k %/ V A Mho Mho A/ V A A V V A A
200 1500 1000 140 140
q q
q
4.5
8.5
LT1506
ELECTRICAL CHARACTERISTICS
TJ = 25C, VIN = 5V, VC = 1.5V, Boost = VIN + 5V, switch open, unless otherwise noted.
PARAMETER Switch On Resistance (Note 6) Maximum Switch Duty Cycle Switch Frequency Switch Frequency Line Regulation Frequency Shifting Threshold on FB Pin Minimum Input Voltage (Note 2) Minimum Boost Voltage (Note 3) Boost Current (Note 4) Input Supply Current (Note 5) Shutdown Supply Current Lockout Threshold Shutdown Thresholds Synchronization Threshold Synchronizing Range SYNC Pin Input Resistance The q denotes specifications which apply over the full operating temperature range. Note 1: Gain is measured with a VC swing equal to 200mV above the switching threshold level to 200mV below the upper clamp level. Note 2: Minimum input voltage is not measured directly, but is guaranteed by other tests. It is defined as the voltage where internal bias lines are still regulated so that the reference voltage and oscillator frequency remain constant. Actual minimum input voltage to maintain a regulated output will depend on output voltage and load current. See Applications Information. Note 3: This is the minimum voltage across the boost capacitor needed to guarantee full saturation of the internal power switch. CONDITIONS ISW = 4.5A
q
MIN
TYP 0.07 93 93 500 0 1.0 4.0 2.3 20 90 3.8 15 2.38 0.37 0.45 1.5 40
MAX 0.1 0.13
VFB = 2.1V or VSENSE = 2.9V
q
VC Set to Give 50% Duty Cycle
q
90 86 460 440 0.8
4.3V VIN 15V f = 10kHz ISW 4.5A ISW = 1A ISW = 4.5A VSHDN = 0V, VSW = 0V, VC Open
q q q q q q q q
VC Open VC Open Device Shutting Down Device Starting Up
q q q q
2.3 0.13 0.25 580
540 560 0.15 1.3 4.3 3.0 35 140 5.4 50 75 2.46 0.60 0.7 2.2 1000
UNITS % % kHz kHz %/ V V V V mA mA mA A A V V V V kHz k
Note 4: Boost current is the current flowing into the boost pin with the pin held 5V above input voltage. It flows only during switch on time. Note 5: Input supply current is the bias current drawn by the input pin with switching disabled. Note 6: Switch on resistance is calculated by dividing VIN to VSW voltage by the forced current (4.5A). See Typical Performance Characteristics for the graph of switch voltage at other currents. Note 7: Transconductance and voltage gain refer to the internal amplifier exclusive of the voltage divider. To calculate gain and transconductance refer to SENSE pin on fixed voltage parts. Divide values shown by the ratio VOUT/2.42.
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LT1506 TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Input Voltage with 3.3V Output
4.7 4.5
SWITCH PEAK CURRENT (A)
INPUT VOLTAGE (V)
4.3 4.1 3.9 3.7 3.5 3.3 1 10 100 LOAD CURRENT (mA) 1000
1506 G12
5.5 5.0 MINIMUM 4.5 4.0 3.5 3.0 0 20 60 40 DUTY CYCLE (%) 80 100
1506 G02
FEEDBACK VOLTAGE (V)
Shutdown Pin Bias Current
-500 - 400 - 300 - 200 -8 AT 2.38V LOCKOUT THRESHOLD -4 0 -50 -25 AT 0.37V SHUTDOWN THRESHOLD. AFTER SHUTDOWN, CURRENT DROPS TO A FEW A 2.40
2.36
INPUT SUPPLY CURRENT (A)
SHUTDOWN PIN VOLTAGE (V)
CURRENT (A)
50 25 75 0 TEMPERATURE (C)
Shutdown Supply Current
70 60 50 40 30 20 10 2500 VIN = 10V
TRANSCONDUCTANCE (Mho)
INPUT SUPPLY CURRENT (A)
GAIN (Mho)
0 0 0.1 0.2 0.3 SHUTDOWN VOLTAGE (V) 0.4
1506 G07
4
UW
100
1506 G04
Switch Peak Current Limit
6.5 6.0 TYPICAL
2.425 2.430
Feedback Pin Voltage
2.420
2.415
2.410 - 50
-25
0
25
50
75
100
125
TEMPERATURE (C)
1506 G03
Lockout and Shutdown Thresholds
25 LOCKOUT 20
Shutdown Supply Current
VSHDN = 0V
2.32
15
0.8 START-UP 0.4 SHUTDOWN
10
5
125
0 50 100 25 75 -50 -25 0 JUNCTION TEMPERATURE (C)
0 125 0 5 10 INPUT VOLTAGE (V) 15
1506 G06
1506 G05
Error Amplifier Transconductance
3000
Error Amplifier Transconductance
200 PHASE 2500 GAIN 100
VC
2000
150
PHASE (DEG)
1500
2000
1000
1500
VFB 2 x 10-3
(
)
ROUT 200k
COUT 12pF
50
500
1000
ERROR AMPLIFIER EQUIVALENT CIRCUIT
0
RLOAD = 50
0 50 0 75 100 25 -50 -25 JUNCTION TEMPERATURE (C)
125
500 100
1k
10k 100k FREQUENCY (Hz)
1M
-50 10M
1506 G09
1506 G08
LT1506 TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Foldback
SWITCHING FREQUENCY (kHz) OR CURRENT (A)
500
550 540
400
FREQUENCY (kHz)
300
510 500 490 480 470
CORE LOSS (W)
SWITCHING FREQUENCY
200
100 FEEDBACK PIN CURRENT 0 0 0.5 1.5 2.0 1.0 FEEDBACK PIN VOLTAGE (V) 2.5
1506 G10
Maximum Load Current at VOUT = 5V
4.4 L= 10H 4.2 4.0
LOAD CURRENT (A)
3.8 3.6 3.4 3.2 3.0 2.8 2.6 5 7 11 9 INPUT VOLTAGE (V) 13 15
1506 G17
LOAD CURRENT (A)
4.0 3.8 3.6 3.4 L= 1.8H 3.2 3.0 4 6 8 10 12 14
1506 G13
BOOST PIN CURRENT (mA)
L= 5H
L= 3H
L= 1.8H
Current Limit Foldback
7 6 FOLDBACK CHARACTERISTICS
THRESHOLD VOLTAGE (V)
5 4 3 2
SWITCH VOLTAGE (mV)
OUTPUT CURRENT (A)
POSSIBLE UNDESIRED CURRENT STABLE POINT FOR SOURCE CURRENT SOURCE LOAD LOAD* RESISTOR LOAD
MOS LOAD 1 0 0 20 40 60 80 100
1506 G18
OUTPUT VOLTAGE (%)
Kool M is a registered trademark of Magnetics, Inc. Metglas is a registered trademark of AlliedSignal Inc. *See "More Than Just Voltage Feedback" in the Applications Information section.
UW
Switching Frequency
1.0
Inductor Core Loss for 3.3V Output
530 520
0.1
TYPE 52 Kool M(R)
0.01 PERMALLOY = 125 Metglas(R)
460 450 - 50 -25 0 25 50 75 100 125
0.001 0 2 4 6 INDUCTANCE (H) 8 10
TEMPERATURE (C)
1506 G11
1506 G01
Maximum Load Current at VOUT = 3.3V
4.4 L= 10H 4.2 L= 5H 100 90 80 70 60 50 40 30 20 10 0
BOOST Pin Current
DUTY CYCLE = 100%
L= 3H
0
1
INPUT VOLTAGE (V)
3 2 4 SWITCH CURRENT (A)
5
1506 G14
VC Pin Shutdown Threshold
1.4 SHUTDOWN 1.2
Switch Voltage Drop
500 450 400 350 300 250 200 150 100 50 25C 125C
1.0
- 40C
0.8
0.6
0.4 -50
0
-25 100 JUNCTION TEMPERATURE (C) 0 25 50 75 125
0
1
2 4 3 SWITCH CURRENT (A)
5
1506 G16
1506 G15
5
LT1506
PIN FUNCTIONS
FB/SENSE: The feedback pin is used to set output voltage using an external voltage divider that generates 2.42V at the pin with the desired output voltage. The fixed voltage (-3.3) parts have the divider included on the chip and the FB pin is used as a SENSE pin, connected directly to the 3.3V output. Three additional functions are performed by the FB pin. When the pin voltage drops below 1.7V, switch current limit is reduced. Below 1.5V the external sync function is disabled. Below 1V, switching frequency is also reduced. See Feedback Pin Function section in Applications Information for details. BOOST: The BOOST pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar NPN power switch. Without this added voltage, the typical switch voltage loss would be about 1.5V. The additional boost voltage allows the switch to saturate and voltage loss approximates that of a 0.07 FET structure, but with much smaller die area. Efficiency improves from 75% for conventional bipolar designs to > 89% for these new parts. VIN: This is the collector of the on-chip power NPN switch. This pin powers the internal circuitry and internal regulator. At NPN switch on and off, high dI/dt edges occur on this pin. Keep the external bypass and catch diode close to this pin. All trace inductance on this path will create a voltage spike at switch off, adding to the VCE voltage across the internal NPN. GND: The GND pin connection needs consideration for two reasons. First, it acts as the reference for the regulated output, so load regulation will suffer if the "ground" end of the load is not at the same voltage as the GND pin of the IC. This condition will occur when load current or other currents flow through metal paths between the GND pin and the load ground point. Keep the ground path short between the GND pin and the load and use a ground plane when possible. The second consideration is EMI caused by GND pin current spikes. Internal capacitance between the VSW pin and the GND pin creates very narrow (<10ns) current spikes in the GND pin. If the GND pin is connected to system ground with a long metal trace, this trace may radiate excess EMI. Keep the path between the input bypass and the GND pin short. The GND pin of the SO-8 package is directly attached to the internal tab. This pin should be attached to a large copper area to improve thermal resistance. VSW: The switch pin is the emitter of the on-chip power NPN switch. This pin is driven up to the input pin voltage during switch on time. Inductor current drives the switch pin negative during switch off time. Negative voltage is clamped with the external catch diode. Maximum negative switch voltage allowed is - 0.8V. SYNC: The sync pin is used to synchronize the internal oscillator to an external signal. It is directly logic compatible and can be driven with any signal between 10% and 90% duty cycle. The synchronizing range is equal to initial operating frequency, up to 1MHz. This pin replaces SHDN on -SYNC option parts. See Synchronizing section in Applications Information for details. SHDN: The shutdown pin is used to turn off the regulator and to reduce input drain current to a few microamperes. Actually, this pin has two separate thresholds, one at 2.38V to disable switching, and a second at 0.4V to force complete micropower shutdown. The 2.38V threshold functions as an accurate undervoltage lockout (UVLO). This is sometimes used to prevent the regulator from operating until the input votlage has reached a predetermined level. VC: The VC pin is the output of the error amplifier and the input of the peak switch current comparator. It is normally used for frequency compensation, but can do double duty as a current clamp or control loop override. This pin sits at about 1V for very light loads and 2V at maximum load. It can be driven to ground to shut off the regulator, but if driven high, current must be limited to 4mA.
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LT1506
BLOCK DIAGRAM
The LT1506 is a constant frequency, current mode buck converter. This means that there is an internal clock and two feedback loops that control the duty cycle of the power switch. In addition to the normal error amplifier, there is a current sense amplifier that monitors switch current on a cycle-by-cycle basis. A switch cycle starts with an oscillator pulse which sets the RS flip-flop to turn the switch on. When switch current reaches a level set by the inverting input of the comparator, the flip-flop is reset and the switch turns off. Output voltage control is obtained by using the output of the error amplifier to set the switch current trip point. This technique means that the error amplifier commands current to be delivered to the output rather than voltage. A voltage fed system will have low phase shift up to the resonant frequency of the inductor
INPUT
2.9V BIAS REGULATOR
SYNC SHUTDOWN COMPARATOR
0.4V SHDN 3.5A FOLDBACK CURRENT LIMIT CLAMP Q2 FREQUENCY SHIFT CIRCUIT PARASITIC DIODES DO NOT FORWARD BIAS
+ -
2.38V
VC
ERROR AMPLIFIER gm = 2000Mho
Figure 1. Block Diagram
+
LOCKOUT COMPARATOR
-
W
and output capacitor, then an abrupt 180 shift will occur. The current fed system will have 90 phase shift at a much lower frequency, but will not have the additional 90 shift until well beyond the LC resonant frequency. This makes it much easier to frequency compensate the feedback loop and also gives much quicker transient response. High switch efficiency is attained by using the BOOST pin to provide a voltage to the switch driver which is higher than the input voltage, allowing switch to be saturated. This boosted voltage is generated with an external capacitor and diode. Two comparators are connected to the shutdown pin. One has a 2.38V threshold for undervoltage lockout and the second has a 0.4V threshold for complete shutdown.
0.01
+
INTERNAL VCC
-
CURRENT SENSE AMPLIFIER VOLTAGE GAIN = 20
SLOPE COMP
0.9V
BOOST
500kHz OSCILLATOR
S CURRENT COMPARATOR
RS FLIP-FLOP
DRIVER CIRCUITRY
+ - - +
R
Q1 POWER SWITCH
VSW
FB
2.42V GND
1506 BD
7
LT1506
APPLICATIONS INFORMATION
FEEDBACK PIN FUNCTIONS The feedback (FB) pin on the LT1506 is used to set output voltage and provide several overload protection features. The first part of this section deals with selecting resistors to set output voltage and the remaining part talks about foldback frequency and current limiting created by the FB pin. Please read both parts before committing to a final design. The fixed 3.3V LT1506-3.3 has internal divider resistors and the FB pin is renamed SENSE, connected directly to the output. The suggested value for the output divider resistor (see Figure 2) from FB to ground (R2) is 5k or less, and a formula for R1 is shown below. The output voltage error caused by ignoring the input bias current on the FB pin is less than 0.25% with R2 = 5k. Please read the following if divider resistors are increased above the suggested values.
R1 = R2 VOUT - 2.42 2.42
(
)
VSW OUTPUT 5V
LT1506
TO FREQUENCY SHIFTING 1.6V ERROR AMPLIFIER Q1
+ -
R5 5k Q2
2.4V R3 1k R4 1k FB
R1
R2 5k TO SYNC CIRCUIT
VC
GND
Figure 2. Frequency and Current Limit Foldback
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More Than Just Voltage Feedback The feedback pin is used for more than just output voltage sensing. It also reduces switching frequency and current limit when output voltage is very low (see the Frequency Foldback graph in Typical Performance Characteristics). This is done to control power dissipation in both the IC and in the external diode and inductor during short-circuit conditions. A shorted output requires the switching regulator to operate at very low duty cycles, and the average current through the diode and inductor is equal to the short-circuit current limit of the switch (typically 6A for the LT1506, folding back to less than 3A). Minimum switch on time limitations would prevent the switcher from attaining a sufficiently low duty cycle if switching frequency were maintained at 500kHz, so frequency is reduced by about 5:1 when the feedback pin voltage drops below 1V (see Frequency Foldback graph). This does not affect operation with normal load conditions; one simply sees a gear shift in switching frequency during start-up as the output voltage rises. In addition to lower switching frequency, the LT1506 also operates at lower switch current limit when the feedback pin voltage drops below 1.7V. Q2 in Figure 2 performs this function by clamping the VC pin to a voltage less than its normal 2.1V upper clamp level. This foldback current limit greatly reduces power dissipation in the IC, diode and inductor during short-circuit conditions. External synchronization is also disabled to prevent interference with foldback operation. Again, it is nearly transparent to the user under normal load conditions. The only loads that may be affected are current source loads which maintain full load current with output voltage less than 50% of final value. In these rare situations the feedback pin can be clamped above 1.5V with an external diode to defeat foldback current limit. Caution: clamping the feedback pin means that frequency shifting will also be defeated, so a combination of high input voltage and dead shorted output may cause the LT1506 to lose control of current limit.
1506 F02
LT1506
APPLICATIONS INFORMATION
The internal circuitry which forces reduced switching frequency also causes current to flow out of the feedback pin when output voltage is low. The equivalent circuitry is shown in Figure 2. Q1 is completely off during normal operation. If the FB pin falls below 1V, Q1 begins to conduct current and reduces frequency at the rate of approximately 5kHz/A. To ensure adequate frequency foldback (under worst-case short-circuit conditions), the external divider Thevinin resistance must be low enough to pull 150A out of the FB pin with 0.6V on the pin (RDIV 4k). The net result is that reductions in frequency and current limit are affected by output voltage divider impedance. Although divider impedance is not critical, caution should be used if resistors are increased beyond the suggested values and short-circuit conditions will occur with high input voltage. High frequency pickup will increase and the protection accorded by frequency and current foldback will decrease. MAXIMUM OUTPUT LOAD CURRENT Maximum load current for a buck converter is limited by the maximum switch current rating (IP) of the LT1506. This current rating is 4.5A up to 50% duty cycle (DC), decreasing to 3.7A at 80% duty cycle. This is shown graphically in Typical Performance Characteristics and as shown in the formula below: IP = 4.5A for DC 50% IP = 3.21 + 5.95(DC) - 6.75(DC)2 for 50% < DC < 90% DC = Duty cycle = VOUT/VIN Example: with VOUT = 5V, VIN = 8V; DC = 5/8 = 0.625, and; ISW(MAX) = 3.21 + 5.95(0.625) - 6.75(0.625)2 = 4.3A Current rating decreases with duty cycle because the LT1506 has internal slope compensation to prevent current mode subharmonic switching. For more details, read Application Note 19. The LT1506 is a little unusual in this regard because it has nonlinear slope compensation which gives better compensation with less reduction in current limit. Maximum load current would be equal to maximum switch current for an infinitely large inductor, but with finite inductor size, maximum load current is reduced by one-half peak-to-peak inductor current. The following formula assumes continuous mode operation, implying that the term on the right is less than one-half of IP. IOUT(MAX) = IP - Continuous Mode
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(V )(V - V ) 2(L)(f)(V )
OUT IN OUT IN
For the conditions above and L = 3.3H,
IOUT (MAX ) = 4.3 -
2 3.3 * 10 - 6 500 * 10 3 8
(5)(8 - 5)
()
= 4.3 - 0.57 = 3.73 A
At VIN = 15V, duty cycle is 33%, so IP is just equal to a fixed 4.5A, and IOUT(MAX) is equal to:
4.5 -
2 3.3 * 10 - 6 500 * 10 3 15
(5)(15 - 5)
()
= 4.5 - 1.01 = 3.49 A
Note that there is less load current available at the higher input voltage because inductor ripple current increases. This is not always the case. Certain combinations of inductor value and input voltage range may yield lower available load current at the lowest input voltage due to reduced peak switch current at high duty cycles. If load current is close to the maximum available, please check maximum available current at both input voltage extremes. To calculate actual peak switch current with a given set of conditions, use:
ISW(PEAK ) = IOUT +
VOUT VIN - VOUT
IN
( ) 2(L)(f)(V )
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LT1506
APPLICATIONS INFORMATION
CHOOSING THE INDUCTOR AND OUTPUT CAPACITOR For most applications the output inductor will fall in the range of 3H to 20H. Lower values are chosen to reduce physical size of the inductor. Higher values allow more output current because they reduce peak current seen by the LT1506 switch, which has a 4.5A limit. Higher values also reduce output ripple voltage, and reduce core loss. Graphs in the Typical Performance Characteristics section show maximum output load current versus inductor size and input voltage. A second graph shows core loss versus inductor size for various core materials. When choosing an inductor you might have to consider maximum load current, core and copper losses, allowable component height, output voltage ripple, EMI, fault current in the inductor, saturation, and of course, cost. The following procedure is suggested as a way of handling these somewhat complicated and conflicting requirements. 1. Choose a value in microhenries from the graphs of maximum load current and core loss. Choosing a small inductor with lighter loads may result in discontinuous mode of operation, but the LT1506 is designed to work well in either mode. Keep in mind that lower core loss means higher cost, at least for closed core geometries like toroids. The core loss graphs show absolute loss for a 3.3V output, so actual percent losses must be calculated for each situation. Assume that the average inductor current is equal to load current and decide whether or not the inductor must withstand continuous fault conditions. If maximum load current is 0.5A, for instance, a 0.5A inductor may not survive a continuous 4.5A overload condition. Dead shorts will actually be more gentle on the inductor because the LT1506 has foldback current limiting. 2. Calculate peak inductor current at full load current to ensure that the inductor will not saturate. Peak current can be significantly higher than output current, especially with smaller inductors and lighter loads, so don't omit this step. Powdered iron cores are forgiving
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because they saturate softly, whereas ferrite cores saturate abruptly. Other core materials fall in between somewhere. The following formula assumes continuous mode of operation, but it errs only slightly on the high side for discontinuous mode, so it can be used for all conditions.
IPEAK = IOUT + VOUT VIN - VOUT
IN
( ) 2(f)(L)(V )
VIN = Maximum input voltage f = Switching frequency, 500kHz 3. Decide if the design can tolerate an "open" core geometry like a rod or barrel, which have high magnetic field radiation, or whether it needs a closed core like a toroid to prevent EMI problems. One would not want an open core next to a magnetic storage media, for instance! This is a tough decision because the rods or barrels are temptingly cheap and small and there are no helpful guidelines to calculate when the magnetic field radiation will be a problem. 4. Start shopping for an inductor (see representative surface mount units in Table 2) which meets the requirements of core shape, peak current (to avoid saturation), average current (to limit heating), and fault current (if the inductor gets too hot, wire insulation will melt and cause turn-to-turn shorts). Keep in mind that all good things like high efficiency, low profile, and high temperature operation will increase cost, sometimes dramatically. Get a quote on the cheapest unit first to calibrate yourself on price, then ask for what you really want. 5. After making an initial choice, consider the secondary things like output voltage ripple, second sourcing, etc. Use the experts in the Linear Technology's applications department if you feel uncertain about the final choice. They have experience with a wide range of inductor types and can tell you about the latest developments in low profile, surface mounting, etc.
LT1506
APPLICATIONS INFORMATION
Table 2
VENDOR/ PART NO. Coiltronics CTX2-1 CTX5-4 CTX8-4 CTX2-1P CTX2-3P CTX5-4P Sumida CDRH125 CDRH125 CDRH125 CDRH125 Coilcraft DT3316-222 DT3316-332 DT3316-472 Pulse PE-53650 PE-53651 PE-53652 PE-53653 Dale IHSM-4825 IHSM-4825 IHSM-5832 IHSM-5832 IHSM-7832 2.7 4.7 10 15 22 5.1 4.0 4.3 3.5 3.8 Open Open Open Open Open 0.034 0.047 0.053 0.078 0.054 Fer Fer Fer Fer Fer 5.6 5.6 7.1 7.1 7.1 4 5 9 16 4.8 5.4 5.5 5.1 Tor Tor Tor Tor 0.017 0.018 0.022 0.032 Fer Fer Fer Fer 9.1 9.1 10 10 2.2 3.3 4.7 5 5 3 SC SC SC 0.035 0.040 0.045 Fer Fer Fer 5.1 5.1 5.1 10 12 15 18 4.0 3.5 3.3 3.0 SC SC SC SC 0.025 0.027 0.030 0.034 Fer Fer Fer Fer 6 6 6 6 2 5 8 2 2 5 4.1 4.4 3.5 3.4 4.6 3.3 Tor Tor Tor Tor Tor Tor 0.011 0.019 0.020 0.014 0.012 0.027 KM KM KM 52 52 52 4.2 6.4 6.4 4.2 4.8 6.4 VALUE DC (H) (Amps) CORE TYPE SERIES CORE RESIS- MATER- HEIGHT TANCE() IAL (mm)
Tor = Toroid SC = Semiclosed geometry Fer = Ferrite core material 52 = Type 52 powdered iron core material KM = Kool M
Output Capacitor The output capacitor is normally chosen by its Effective Series Resistance (ESR), because this is what determines output ripple voltage. At 500kHz, any polarized capacitor is essentially resistive. To get low ESR takes volume, so physically smaller capacitors have high ESR. The ESR
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range for typical LT1506 applications is 0.05 to 0.2. A typical output capacitor is an AVX type TPS, 100F at 10V, with a guaranteed ESR less than 0.1. This is a "D" size surface mount solid tantalum capacitor. TPS capacitors are specially constructed and tested for low ESR, so they give the lowest ESR for a given volume. The value in microfarads is not particularly critical, and values from 22F to greater than 500F work well, but you cannot cheat mother nature on ESR. If you find a tiny 22F solid tantalum capacitor, it will have high ESR, and output ripple voltage will be terrible. Table 3 shows some typical solid tantalum surface mount capacitors.
Table 3. Surface Mount Solid Tantalum Capacitor ESR and Ripple Current E Case Size ESR (Max., ) Ripple Current (A)
AVX TPS, Sprague 593D AVX TAJ D Case Size AVX TPS, Sprague 593D C Case Size AVX TPS 0.2 (typ) 0.5 (typ) 0.1 to 0.3 0.7 to 1.1 0.1 to 0.3 0.7 to 0.9 0.7 to 1.1 0.4
Many engineers have heard that solid tantalum capacitors are prone to failure if they undergo high surge currents. This is historically true, and type TPS capacitors are specially tested for surge capability, but surge ruggedness is not a critical issue with the output capacitor. Solid tantalum capacitors fail during very high turn-on surges, which do not occur at the output of regulators. High discharge surges, such as when the regulator output is dead shorted, do not harm the capacitors. Unlike the input capacitor, RMS ripple current in the output capacitor is normally low enough that ripple current rating is not an issue. The current waveform is triangular with a typical value of 200mARMS. The formula to calculate this is: Output Capacitor Ripple Current (RMS):
IRIPPLE(RMS) = 0.29 VOUT VIN - VOUT
IN
( )( (L)(f)(V )
)
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LT1506
APPLICATIONS INFORMATION
Ceramic Capacitors Higher value, lower cost ceramic capacitors are now available in smaller case sizes. These are ideal for input bypassing because of their high ripple rating and tolerance to turn-on surges. As output capacitors, caution must be used. Solid tantalum capacitor's ESR generates a loop "zero" at 5kHz to 50kHz that is beneficial in giving acceptable loop phase margin. Ceramic capacitors remain capacitive to beyond 300kHz and usually resonate with their ESL before ESR becomes effective. When using ceramic output capacitors, the loop compensation pole frequency must be reduced by a typical factor of 10. OUTPUT RIPPLE VOLTAGE Figure 3 shows a typical output ripple voltage waveform for the LT1506. Ripple voltage is determined by the high frequency impedance of the output capacitor, and ripple current through the inductor. Peak-to-peak ripple current through the inductor into the output capacitor is:
IP-P
(V )(V - V ) = (V )(L)(f)
OUT IN OUT IN
For high frequency switchers, the sum of ripple current slew rates may also be relevant and can be calculated from:
dI VIN = dt L
Peak-to-peak output ripple voltage is the sum of a triwave created by peak-to-peak ripple current times ESR, and a square wave created by parasitic inductance (ESL) and ripple current slew rate. Capacitive reactance is assumed to be small compared to ESR or ESL.
VRIPPLE = IP-P ESR + ESL
( )( ) ( )
dI dt
Example: with VIN =10V, VOUT = 5V, L = 10H, ESR = 0.1, ESL = 10nH:
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IP-P =
= 0.5A 10 10 * 10 - 6 500 * 103 10 dI = 10 6 = dt 10 * 10 - 6 VRIPPLE = 0.5A 0.1 + 10 * 10 - 9 10 6 = 0.05 + 0.01 = 60mVP-P
()
(5)(10 - 5)
( )( )
VOUT AT IOUT = 1A 20mV/DIV VOUT AT IOUT = 50mA
INDUCTOR CURRENT AT IOUT = 1A 0.5A/DIV INDUCTOR CURRENT AT IOUT = 50mA 0.5s/DIV
1374 F03
Figure 3. LT1506 Ripple Voltage Waveform
CATCH DIODE The suggested catch diode (D1) is a 1N5821 Schottky, or its Motorola equivalent, MBR330. It is rated at 3A average forward current and 30V reverse voltage. Typical forward voltage is 0.5V at 3A. The diode conducts current only during switch off time. Peak reverse voltage is equal to regulator input voltage. Average forward current in normal operation can be calculated from:
ID(AVG) = IOUT VIN - VOUT VIN
(
)
This formula will not yield values higher than 3A with maximum load current of 4.25A unless the ratio of input to output voltage exceeds 3.4:1. The only reason to consider a larger diode is the worst-case condition of a high input voltage and overloaded (not shorted) output. Under shortcircuit conditions, foldback current limit will reduce diode current to less than 2.6A, but if the output is overloaded
LT1506
APPLICATIONS INFORMATION
and does not fall to less than 1/3 of nominal output voltage, foldback will not take effect. With the overloaded condition, output current will increase to a typical value of 5.7A, determined by peak switch current limit of 6A. With VIN = 15V, VOUT = 4V (5V overloaded) and IOUT = 5.7A:
ID(AVG) = 5.7 15 - 4 15
C MIN =
(
) = 4.18A
This is safe for short periods of time, but it would be prudent to check with the diode manufacturer if continuous operation under these conditions must be tolerated. BOOST PIN CONSIDERATIONS For most applications, the boost components are a 0.27F capacitor and a 1N914 or 1N4148 diode. The anode is connected to the regulated output voltage and this generates a voltage across the boost capacitor nearly identical to the regulated output. In certain applications, the anode may instead be connected to the unregulated input voltage. This could be necessary if the regulated output voltage is very low (< 3V) or if the input voltage is less than 5V. Efficiency is not affected by the capacitor value, but the capacitor should have an ESR of less than 1 to ensure that it can be recharged fully under the worst-case condition of minimum input voltage. Almost any type of film or ceramic capacitor will work fine. For nearly all applications, a 0.27F boost capacitor works just fine, but for the curious, more details are provided here. The size of the boost capacitor is determined by switch drive current requirements. During switch on time, drain current on the capacitor is approximately IOUT/ 50. At peak load current of 4.25A, this gives a total drain of 85mA. Capacitor ripple voltage is equal to the product of on time and drain current divided by capacitor value; V = (tON)(85mA/C). To keep capacitor ripple voltage to less than 0.6V (a slightly arbitrary number) at the worstcase condition of tON = 1.8s, the capacitor needs to be 0.27F. Boost capacitor ripple voltage is not a critical parameter, but if the minimum voltage across the capacitor drops to less than 3V, the power switch may not saturate fully and efficiency will drop. An approximate formula for absolute minimum capacitor value is:
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(IOUT / 50)(VOUT / VIN) (f)(VOUT - 2.8 V)
f = Switching frequency VOUT = Regulated output voltage VIN = Minimum input voltage This formula can yield capacitor values substantially less than 0.27F, but it should be used with caution since it does not take into account secondary factors such as capacitor series resistance, capacitance shift with temperature and output overload. SHUTDOWN FUNCTION AND UNDERVOLTAGE LOCKOUT Figure 4 shows how to add undervoltage lockout (UVLO) to the LT1506. Typically, ULVO is used in situations where the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant power from the source, so source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. ULVO prevents the regulator from operating at source voltages where these problems might occur. Threshold voltage for lockout is about 2.38V, slightly less than the internal 2.42V reference voltage. A 3.5A bias current flows out of the pin at threshold. This internally generated current is used to force a default high state on the shutdown pin if the pin is left open. When low shutdown current is not an issue, the error due to this current can be minimized by making RLO 10k or less. If shutdown current is an issue, RLO can be raised to 100k, but the error due to initial bias current and changes with temperature should be considered.
RLO = 10k to 100k 25k suggested RHI = RLO VIN - 2.38V
(
(
2.38V - RLO 3.5 A
(
)
)
)
VIN = Minimum input voltage
13
LT1506
APPLICATIONS INFORMATION
RFB
LT1506 INPUT IN 2.38V RHI 3.5A SHDN VSW OUTPUT
C1
RLO
Figure 4. Undervoltage Lockout
Keep the connections from the resistors to the shutdown pin short and make sure that interplane or surface capacitance to the switching nodes are minimized. If high resistor values are used, the shutdown pin should be bypassed with a 1000pF capacitor to prevent coupling problems from the switch node. If hysteresis is desired in the undervoltage lockout point, a resistor RFB can be added to the output node. Resistor values can be calculated from:
RHI =
RLO VIN - 2.38 V / VOUT + 1 + V
[
(
RFB = RHI VOUT / V
( )(
2.38 - R2 3.5A
)
(
)
)
]
25k suggested for RLO VIN = Input voltage at which switching stops as input voltage descends to trip level V = Hysteresis in input voltage level Example: output voltage is 5V, switching is to stop if input voltage drops below 6V and should not restart unless input rises back to 7.5V. V is therefore 1.5V and VIN = 6V. Let RLO = 25k.
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+
STANDBY
- +
TOTAL SHUTDOWN 0.4V
+
-
GND
1506 F04
R HI = =
25k 6 - 2.38 1.5 / 5 + 1 + 1.5
[
(
25k 5.2
2.29 R FB = 48k 5 / 1.5 = 160 k
( ) = 48k ( )
2.38 - 25k 3.5A
(
)
)
]
SWITCH NODE CONSIDERATIONS For maximum efficiency, switch rise and fall times are made as short as possible. To prevent radiation and high frequency resonance problems, proper layout of the components connected to the switch node is essential. B field (magnetic) radiation is minimized by keeping catch diode, switch pin, and input bypass capacitor leads as short as possible. E field radiation is kept low by minimizing the length and area of all traces connected to the switch pin and BOOST pin. A ground plane should always be used under the switcher circuitry to prevent interplane coupling. A suggested layout for the critical components is shown in Figure 5. Note that the feedback resistors and compensation components are kept as far as possible
LT1506
APPLICATIONS INFORMATION
from the switch node. Also note that the high current ground path of the catch diode and input capacitor are kept very short and separate from the analog ground line. The high speed switching current path is shown schematically in Figure 6. Minimum lead length in this path is essential to ensure clean switching and low EMI. The path including the switch, catch diode, and input capacitor is
MINIMIZE LT1506 C3, D1 LOOP
VIN
C3
1 GND U1 L1
C1 CONNECT TO GROUND PLANE PLACE FEEDTHROUGHS AROUND GND PIN FOR GOOD THERMAL CONDUCTIVITY KEEP FB AND VC COMPONENTS AWAY FROM HIGH FREQUENCY, HIGH CURRENT COMPONENTS
R3
R2
Figure 5. Suggested Layout (Topside Only Shown)
VIN
Figure 6. High Speed Switching Path
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the only one containing nanosecond rise and fall times. If you follow this path on the PC layout, you will see that it is irreducibly short. If you move the diode or input capacitor away from the LT1506, get your resume in order. The other paths contain only some combination of DC and 500kHz triwave, so are much less critical.
CONNECT TO GROUND PLANE
D1
C5
GND
C6
VOUT TAKE OUTPUT DIRECTLY FROM END OF OUTPUT CAPACITOR
D2
C4
KELVIN SENSE VOUT
1506 F05
SWITCH NODE L1 5V
HIGH FREQUENCY CIRCULATING PATH
LOAD
1506 F06
15
LT1506
APPLICATIONS INFORMATION
PARASITIC RESONANCE Resonance or "ringing" may sometimes be seen on the switch node (see Figure 7). Very high frequency ringing following switch rise time is caused by switch/diode/input capacitor lead inductance and diode capacitance. Schottky diodes have very high "Q" junction capacitance that can ring for many cycles when excited at high frequency. If total lead length for the input capacitor, diode and switch path is 1 inch, the inductance will be approximately 25nH. At switch off, this will produce a spike across the NPN output device in addition to the input voltage. At higher currents this spike can be in the order of 10V to 20V or higher with a poor layout, potentially exceeding the absolute max switch voltage. The path around switch, catch diode and input capacitor must be kept as short as possible to ensure reliable operation. When looking at this, a >100MHz oscilloscope must be used, and waveforms should be observed on the leads of the package. This switch off spike will also cause the SW node to go below ground. The LT1506 has special circuitry inside which mitigates this problem, but negative voltages over 1V lasting longer than 10ns should be avoided. Note that 100MHz oscilloscopes are barely fast enough to see the details of the falling edge overshoot in Figure 7. A second, much lower frequency ringing is seen during switch off time if load current is low enough to allow the inductor current to fall to zero during part of the switch off time (see Figure 8). Switch and diode capacitance resonate with the inductor to form damped ringing at 1MHz to 10 MHz. This ringing is not harmful to the regulator and it has not been shown to contribute significantly to EMI. Any attempt to damp it with a resistive snubber will degrade efficiency. INPUT BYPASSING AND VOLTAGE RANGE Input Bypass Capacitor Step-down converters draw current from the input supply in pulses. The average height of these pulses is equal to load current, and the duty cycle is equal to VOUT/ VIN. Rise and fall time of the current is very fast. A local bypass capacitor across the input supply is necessary to ensure proper operation of the regulator and minimize the ripple current fed back into the input supply. The capacitor also forces switching current to flow in a tight local loop, minimizing EMI.
5V/DIV
RISE AND FALL WAVEFORMS ARE SUPERIMPOSED (PULSE WIDTH IS NOT 120ns)
20ns/DIV
1375/76 F07
Figure 7. Switch Node Resonance
5V/DIV
SWITCH NODE VOLTAGE
100mA/DIV
INDUCTOR CURRENT
20ns/DIV 0.5s/DIV
1375/76 F11
1375/76 F08
Figure 8. Discontinuous Mode Ringing
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Do not cheat on the ripple current rating of the Input bypass capacitor, but also don't get hung up on the value in microfarads. The input capacitor is intended to absorb all the switching current ripple, which can have an RMS value as high as one half of load current. Ripple current ratings on the capacitor must be observed to ensure reliable operation. In many cases it is necessary to parallel two capacitors to obtain the required ripple rating. Both capacitors must be of the same value and manufacturer to guarantee power sharing. The actual value of the capacitor in microfarads is not particularly important because at 500kHz, any value above 5F is essentially resistive. RMS ripple current rating is the critical parameter. Actual RMS current can be calculated from:
IRIPPLE(RMS) = IOUT VOUT VIN - VOUT / VIN
(
)
2
LT1506
APPLICATIONS INFORMATION
The term inside the radical has a maximum value of 0.5 when input voltage is twice output, and stays near 0.5 for a relatively wide range of input voltages. It is common practice therefore to simply use the worst-case value and assume that RMS ripple current is one half of load current. At maximum output current of 4.5A for the LT1506, the input bypass capacitor should be rated at 2.25A ripple current. Note however, that there are many secondary considerations in choosing the final ripple current rating. These include ambient temperature, average versus peak load current, equipment operating schedule, and required product lifetime. For more details, see Application Notes 19 and 46, and Design Note 95. Input Capacitor Type Some caution must be used when selecting the type of capacitor used at the input to regulators. Aluminum electrolytics are lowest cost, but are physically large to achieve adequate ripple current rating, and size constraints (especially height), may preclude their use. Ceramic capacitors are now available in larger values, and their high ripple current and voltage rating make them ideal for input bypassing. Cost is fairly high and footprint may also be somewhat large. Solid tantalum capacitors would be a good choice, except that they have a history of occasional spectacular failures when they are subjected to large current surges during power-up. The capacitors can short and then burn with a brilliant white light and lots of nasty smoke. This phenomenon occurs in only a small percentage of units, but it has led some OEM companies to forbid their use in high surge applications. The input bypass capacitor of regulators can see these high surges when a battery or high capacitance source is connected. Several manufacturers have developed a line of solid tantalum capacitors specially tested for surge capability (AVX TPS series for instance, see Table 3), but even these units may fail if the input voltage surge approaches the maximum voltage rating of the capacitor. AVX recommends derating capacitor voltage by 2:1 for high surge applications. Larger capacitors may be necessary when the input voltage is very close to the minimum specified on the data sheet. Small voltage dips during switch on time are not normally a problem, but at very low input voltage they may cause erratic operation because the input voltage drops below the minimum specification. Problems can also occur if the input-to-output voltage differential is near minimum. The amplitude of these dips is normally a function of capacitor ESR and ESL because the capacitive reactance is small compared to these terms. ESR tends to be the dominate term and is inversely related to physical capacitor size within a given capacitor type. SYNCHRONIZING (-SYNC Option for DD Package) The SYNC pin, is used to synchronize the internal oscillator to an external signal. The SYNC input must pass from a logic level low, through the maximum synchronization threshold with a duty cycle between 10% and 90%. The input can be driven directly from a logic level output. The synchronizing range is equal to initial operating frequency up to 1MHz. This means that minimum practical sync frequency is equal to the worst-case high self-oscillating frequency (560kHz), not the typical operating frequency of 500kHz. Caution should be used when synchronizing above 700kHz because at higher sync frequencies the amplitude of the internal slope compensation used to prevent subharmonic switching is reduced. This type of subharmonic switching only occurs at input voltages less than twice output voltage. Higher inductor values will tend to eliminate this problem. See Frequency Compensation section for a discussion of an entirely different cause of subharmonic switching before assuming that the cause is insufficient slope compensation. Application Note 19 has more details on the theory of slope compensation. At power-up, when VC is being clamped by the FB pin (see Figure 2, Q2), the sync function is disabled. This allows the frequency foldback to operate in the shorted output condition. During normal operation, switching frequency is controlled by the internal oscillator until the FB pin reaches 1.5V, after which the SYNC pin becomes operational. THERMAL CALCULATIONS Power dissipation in the LT1506 chip comes from four sources: switch DC loss, switch AC loss, boost circuit current, and input quiescent current. The following
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LT1506
APPLICATIONS INFORMATION
formulas show how to calculate each of these losses. These formulas assume continuous mode operation, so they should not be used for calculating efficiency at light load currents. Switch loss: TJ = TA + JA (PTOT) With the SO-8 package (JA = 80C/W), at an ambient temperature of 50C, TJ = 50 + 80 (0.87) = 120C Die temperature is highest at low input voltage, so use lowest continuous input operating voltage for thermal calculations. FREQUENCY COMPENSATION
PSW =
RSW IOUT
( ) (VOUT ) + 24ns(I )(V )(f) OUT IN VIN
2
Boost current loss:
PBOOST =
VOUT IOUT / 50 VIN
2
(
)
Quiescent current loss:
PQ = VIN 0.001 + VOUT
(
)
(
2 VOUT (0.002 0.005 + VIN
)
RSW = Switch resistance (0.07) 24ns = Equivalent switch current/voltage overlap time f = Switch frequency Example: with VIN = 10V, VOUT = 5V and IOUT = 3A:
PSW
(0.07)(3) (5) + 24 * 10 (3)(10) 500 * 10 = 10
2 -9 3
= 0.32 + 0.36 = 0.68W PBOOST
(5) (3 / 50) = 0.15W =
2
10
PQ = 10 0.001 + 5 0.005 +
Thermal resistance for LT1506 package is influenced by the presence of internal or backside planes. With a full plane under the SO package, thermal resistance will be about 80C/W. No plane will increase resistance to about 120C/W. To calculate die temperature, use the proper thermal resistance number for the desired package and add in worst-case ambient temperature:
GND
VC
CF
RC CC
Figure 9. Model for Loop Response
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+
Total power dissipation is 0.68 + 0.15 + 0.04 = 0.87W.
-
(
)(
) ( ) (10 ) = 0.04W
5
2
0.002
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)
Loop frequency compensation of switching regulators can be a rather complicated problem because the reactive components used to achieve high efficiency also introduce multiple poles into the feedback loop. The inductor and output capacitor on a conventional stepdown converter actually form a resonant tank circuit that can exhibit peaking and a rapid 180 phase shift at the resonant frequency. By contrast, the LT1506 uses a "current mode" architecture to help alleviate phase shift created by the inductor. The basic connections are shown in Figure 9. Figure 10 shows a Bode plot of the phase and gain of the power section of the LT1506, measured from the VC pin to the output. Gain is set by the 5.3A/V transconductance of the LT1506 power section and the effective complex impedance from output to ground. Gain rolls off smoothly above the 600Hz pole frequency set by the 100F output capacitor. Phase drop is limited to about 70. Phase recovers and gain levels off at the zero frequency (16kHz) set by capacitor ESR (0.1).
LT1506 CURRENT MODE POWER STAGE gm = 5.3A/V VSW ERROR AMPLIFIER FB ESR R1 OUTPUT
2.42V
+
C1 R2
1506 F09
LT1506
APPLICATIONS INFORMATION
40 GAIN 20
GAIN: VC PIN TO OUTPUT (dB)
VIN = 10V VOUT = 5V IOUT = 2A
40
PHASE: VC PIN TO OUTPUT (DEG)
0
GAIN (Mho)
0 PHASE -20
-40
-80
-40
10
100
1k 10k FREQUENCY (Hz)
100k
-120 1M
1505 F10
Figure 10. Response from VC Pin to Output
Error amplifier transconductance phase and gain are shown in Figure 11. The error amplifier can be modeled as a transconductance of 2000Mho, with an output impedance of 200k in parallel with 12pF. In all practical applications, the compensation network from VC pin to ground has a much lower impedance than the output impedance of the amplifier at frequencies above 500Hz. This means that the error amplifier characteristics themselves do not contribute excess phase shift to the loop, and the phase/gain characteristics of the error amplifier section are completely controlled by the external compensation network. In Figure 12, full loop phase/gain characteristics are shown with a compensation capacitor of 1.5nF, giving the error amplifier a pole at 530Hz, with phase rolling off to 90 and staying there. The overall loop has a gain of 74dB at low frequency, rolling off to unity-gain at 100kHz. Phase shows a two-pole characteristic until the ESR of the output capacitor brings it back above 10kHz. Phase margin is about 60 at unity-gain. Analog experts will note that around 4.4kHz, phase dips very close to the zero phase margin line. This is typical of switching regulators, especially those that operate over a wide range of loads. This region of low phase is not a problem as long as it does not occur near unity-gain. In practice, the variability of output capacitor ESR tends to dominate all other effects with respect to loop response. Variations in ESR will cause unity-gain to move around, but at the same time phase moves with it so that adequate phase margin is maintained over a very wide range of ESR ( 3:1).
LOOP GAIN (dB)
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3000 PHASE 2500 GAIN
200
150
PHASE (DEG)
2000
100
1500
VFB 2 x 10-3
(
)
VC ROUT 200k COUT 12pF
50
1000
ERROR AMPLIFIER EQUIVALENT CIRCUIT
0
RLOAD = 50 500 100 1k 10k 100k FREQUENCY (Hz) 1M -50 10M
1506 F11
Figure 11. Error Amplifier Gain and Phase
80 GAIN 200
60
150
LOOP PHASE (DEG)
40 PHASE
100
20 VIN = 10V VOUT = 5V, IOUT = 2A COUT = 100F, 10V, AVX TPS CC = 1.5nF, RC = 0, L = 10H 10 100 1k 10k FREQUENCY (Hz)
50
0
0
-20
100k
-50 1M
1505 F12
Figure 12. Overall Loop Characteristics
What About a Resistor in the Compensation Network? It is common practice in switching regulator design to add a "zero" to the error amplifier compensation to increase loop phase margin. This zero is created in the external network in the form of a resistor (RC) in series with the compensation capacitor. Increasing the size of this resistor generally creates better and better loop stability, but there are two limitations on its value. First, the combination of output capacitor ESR and a large value for RC may cause loop gain to stop rolling off altogether, creating a gain margin problem. An approximate formula for RC where gain margin falls to zero is:
R C Loop Gain = 1 =
(
) (G )(G V)(ESR)(2.42)
OUT MP MA
19
LT1506
APPLICATIONS INFORMATION
GMP = Transconductance of power stage = 5.3A/V GMA = Error amplifier transconductance = 2(10-3) ESR = Output capacitor ESR 2.42 = Reference voltage With VOUT = 5V and ESR = 0.03, a value of 6.5k for RC would yield zero gain margin, so this represents an upper limit. There is a second limitation however which has nothing to do with theoretical small signal dynamics. This resistor sets high frequency gain of the error amplifier, including the gain at the switching frequency. If switching frequency gain is high enough, output ripple voltage will appear at the VC pin with enough amplitude to muck up proper operation of the regulator. In the marginal case, subharmonic switching occurs, as evidenced by alternating pulse widths seen at the switch node. In more severe cases, the regulator squeals or hisses audibly even though the output voltage is still roughly correct. None of this will show on a theoretical Bode plot because Bode is an amplitude insensitive analysis. Tests have shown that if ripple voltage on the VC is held to less than 100mVP-P, the LT1506 will be well behaved. The formula below will give an estimate of VC ripple voltage when RC is added to the loop, assuming that RC is large compared to the reactance of CC at 500kHz.
VC(RIPPLE ) =
(R )(G )(V - V )(ESR)(2.4) (V )(L)(f)
C MA IN OUT IN
GMA = Error amplifier transconductance (2000Mho) If a computer simulation of the LT1506 showed that a series compensation resistor of 3k gave best overall loop response, with adequate gain margin, the resulting VC pin ripple voltage with VIN = 10V, VOUT = 5V, ESR = 0.1, L = 10H, would be: VC (RIPPLE
(3k) 2 * 10 (10 - 5)(0.1)(2.4) = 0.144V )= (10) 10 * 10 500 * 10
-3 -6 3
This ripple voltage is high enough to possibly create subharmonic switching. In most situations a compromise value (< 2k in this case) for the resistor gives acceptable phase margin and no subharmonic problems. In other
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cases, the resistor may have to be larger to get acceptable phase response, and some means must be used to control ripple voltage at the VC pin. The suggested way to do this is to add a capacitor (CF) in parallel with the RC /CC network on the VC pin. Pole frequency for this capacitor is typically set at one-fifth of switching frequency so that it provides significant attenuation of switching ripple, but does not add unacceptable phase shift at loop unity-gain frequency. With RC = 3k,
CF =
(2)(f)(R )
C
5
=
5
2 500 * 103 3k
()
= 531pF
How Do I Test Loop Stability? The "standard" compensation for LT1506 is a 1.5nF capacitor for CC, with RC = 0. While this compensation will work for most applications, the "optimum" value for loop compensation components depends, to various extent, on parameters which are not well controlled. These include inductor value (30% due to production tolerance, load current and ripple current variations), output capacitance (20% to 50% due to production tolerance, temperature, aging and changes at the load), output capacitor ESR (200% due to production tolerance, temperature and aging), and finally, DC input voltage and output load current . This makes it important for the designer to check out the final design to ensure that it is "robust" and tolerant of all these variations. I check switching regulator loop stability by pulse loading the regulator output while observing transient response at the output, using the circuit shown in Figure 13. The regulator loop is "hit" with a small transient AC load current at a relatively low frequency, 50Hz to 1kHz. This causes the output to jump a few millivolts, then settle back to the original value, as shown in Figure 14. A well behaved loop will settle back cleanly, whereas a loop with poor phase or gain margin will "ring" as it settles. The number of rings indicates the degree of stability, and the frequency of the ringing shows the approximate unity-gain frequency of the loop. Amplitude of the signal is not particularly important, as long as the amplitude is not so high that the loop behaves nonlinearly.
LT1506
APPLICATIONS INFORMATION
RIPPLE FILTER SWITCHING REGULATOR 470 4.7k 330pF TO X1 OSCILLOSCOPE PROBE
ADJUSTABLE INPUT SUPPLY
ADJUSTABLE DC LOAD
Figure 13. Loop Stability Test Circuit
VOUT AT IOUT = 500mA BEFORE FILTER VOUT AT IOUT = 500mA AFTER FILTER VOUT AT IOUT = 50mA AFTER FILTER 5A/DIV 0.2ms/DIV LOAD PULSE THROUGH 50 f 780Hz
1375/76 F14
10mV/DIV
Figure 14. Loop Stability Check
The output of the regulator contains both the desired low frequency transient information and a reasonable amount of high frequency (500kHz) ripple. The ripple makes it difficult to observe the small transient, so a two-pole, 100kHz filter has been added. This filter is not particularly critical; even if it attenuated the transient signal slightly, this wouldn't matter because amplitude is not critical. After verifying that the setup is working correctly, I start varying load current and input voltage to see if I can find any combination that makes the transient response look suspiciously "ringy." This procedure may lead to an adjustment for best loop stability or faster loop transient response. Nearly always you will find that loop response looks better if you add in several k for RC. Do this only if necessary, because as explained before, RC above 1k may require the addition of CF to control VC pin ripple. If everything looks OK, I use a heat gun and cold spray on the circuit (especially the output capacitor) to bring out any temperature-dependent characteristics.
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+
100F TO 1000F 50
3300pF
TO OSCILLOSCOPE SYNC 100Hz TO 1kHz 100mV TO 1VP-P
1506 F13
Keep in mind that this procedure does not take initial component tolerance into account. You should see fairly clean response under all load and line conditions to ensure that component variations will not cause problems. One note here: according to Murphy, the component most likely to be changed in production is the output capacitor, because that is the component most likely to have manufacturer variations (in ESR) large enough to cause problems. It would be a wise move to lock down the sources of the output capacitor in production. A possible exception to the "clean response" rule is at very light loads, as evidenced in Figure 14 with ILOAD = 50mA. Switching regulators tend to have dramatic shifts in loop response at very light loads, mostly because the inductor current becomes discontinuous. One common result is very slow but stable characteristics. A second possibility is low phase margin, as evidenced by ringing at the output with transients. The good news is that the low phase margin at light loads is not particularly sensitive to component variation, so if it looks reasonable under a transient test, it will probably not be a problem in production. Note that frequency of the light load ringing may vary with component tolerance but phase margin generally hangs in there. CURRENT SHARING MULTIPHASE SUPPLY The circuit in Figure 15 uses multiple LT1506s to produce a 5V, 12A power supply. There are several advantages to using a multiple switcher approach compared to a single larger switcher. The inductor size is considerably reduced. Three 4A inductors store less energy (LI2/2) than one 12A coil so are far smaller. In addition, synchronizing three
21
LT1506
APPLICATIONS INFORMATION
converters 120 out of phase with each other reduces input and output ripple currents. This reduces the ripple rating, size and cost of filter capacitors. Current Sharing/Split Input Supplies Current sharing is accomplished by joining the VC pins to a common compensation capacitor. The output of the error amplifier is a gm stage, so any number of devices can be connected together. The effective gm of the composite error amplifier is the multiple of the individual devices. In Figure 15, the compensation capacitor C4 has been increased by x3. Tolerances in the reference voltages result in small offset currents to flow between the VC pins. The overall effect is that the loop regulates the output at a voltage between the minimum and maximum reference of the devices used. Switch current matching between devices will be typically better than 300mA. The negative temperature coefficient of the VC to switch current transconductance prevents current hogging. A common VC voltage forces each LT1506 to operate at the same switch current, not duty cycle. Each device operates at the duty cycle defined by its respective input voltage. In Figure 15, the input could be split and each device operated at a different voltage. The common VC ensures loading is shared between inputs.
3-BIT RING COUNTER 1.8MHz
LT1506-SYNC VC SYNC SW GND VIN BOOST FB
VC SYNC SW GND VIN BOOST FB
INPUT 6V TO 15V
+
C3A 10F 25V D1A
+
L1A 6.8H
C2A 330nF 10V
D2A
L1B 6.8H
Figure 15. Current Sharing 12A Supply
22
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W
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Synchronized Ripple Currents A ring counter generates three synchronization signals at 600kHz, 33% duty cycle phased 120 apart. The sync input will operate over a wide range of duty cycles, so no further pulse conditioning is needed. Each device's maximum input ripple current is a 4A square wave at 600kHz. When synchronously added together, the ripple remains at 4A but frequency increases to 1.8MHz. Likewise, the output ripple current is a 1.8MHz triangular waveform, with maximum amplitude of 350mA at 10V VIN. Interestingly, at 7.6V and 15V VIN, the theoretical summed output ripple current cancels completely. To reduce board space and ripple voltage, C1 and C3 are ceramic capacitors. Loop compensation C4 must be adjusted when using ceramic output capacitors due to the lack of effective series resistance. The typical tantalum compensation of 1.5nF is increased to 22nF (x 3) for the ceramic output capacitor. If synchronization is not used and the internal oscillators free run, the circuit will operate correctly, but ripple cancellation will not occur. Input and output capacitors must be ripple rated for the total output current.
C1, C3: MARCON THCS50E1E106Z D1: ROHM RB051L-40 D2: 1N914 L1: DO3316P-682
LT1506-SYNC
LT1506-SYNC VC SYNC SW GND VIN BOOST FB R1 5.36k 1% + 5V 12A C1 10F 25V
C3B 10F 25V D1B
+
C4 68nF 25V
+
C3C 10F 25V D1C
R2 4.99k 1%
+
C2B 330nF 10V
+
D2B L1C 6.8H
C2C 330nF 10V
+
D2C
1506 F15
LT1506
APPLICATIONS INFORMATION
Redundant Operation The circuit shown in Figure 15 is fault tolerant when operating at less than 8A of output current. If one device fails, the output will remain in regulation. The feedback loop will compensate by raising the voltage on the VC pin, increasing switch current of the two remaining devices. BUCK CONVERTER WITH ADJUSTABLE SOFT START Large capacitive loads can cause high input currents at start-up. Figure 16 shows a circuit that limits the dv/dt of the output at start-up, controlling the capacitor charge rate. The buck converter is a typical configuration with the addition of R3, R4, CSS and Q1. As the output starts to rise, Q1 turns on, regulating switch current via the VC pin to maintain a constant dv/dt at the output. Output rise time is controlled by the current through CSS defined by R4 and Q1's VBE. Once the output is in regulation, Q1 turns off and the circuit operates normally. R3 is transient protection for the base of Q1. RiseTime = (R4)(CSS )(VOUT ) (VBE ) output current is unchanged. Variants of this circuit can be used for sequencing multiple regulator outputs. Dual Output SEPIC Converter The circuit in Figure 17 generates both positive and negative 5V outputs with a single piece of magnetics. The two inductors shown are actually just two windings on a standard B H Electronics inductor. The topology for the 5V output is a standard buck converter. The - 5V topology would be a simple flyback winding coupled to the buck converter if C4 were not present. C4 creates a SEPIC (Single-Ended Primary Inductance Converter) topology whicn improves regulation and reduces ripple current in L1. Without C4, the voltage swing on L1B compared to L1A would vary due to relative loading and coupling losses. C4 provides a low impedance path to maintain an equal voltage swing in L1B, improving regulation. In a flyback converter, during switch on time, all the converter's energy is stroed in L1A only, since no current flows in L1B. At switch off, energy is transferred by magnetic coupling into L1B, powering the - 5V rail. C4 pulls L1B positive during switch on time, causing current to flow, and energy to build in L1B and C4. At switch off, the energy stored in both L1B and C4 supply the -5V rail. This reduces the current in L1A and changes L1B current waveform from square to triangular. For details on this circuit see Design Note 100.
D2 1N914 C2 0.27F INPUT 6V TO 15V
D2 1N914 C2 0.33F INPUT 12V BOOST L1 5H VSW LT1506 SHDN GND FB VC CC 1.5nF CSS R3 15nF 2k R4 47k R2 4.99k D1 C1 100F R1 5.36k VIN OUTPUT 5V 4A
Using the values shown in Figure 16, RiseTime = (47 * 103 )(15 * 10 -9 )(5) = 5ms 0.7
The ramp is linear and rise times in the order of 100ms are possible. Since the circuit is voltage controlled, the ramp rate is unaffected by load characteristics and maximum
BOOST VIN LT1506 SHDN GND
+
C3 10F
Q1
1506 F16
Figure 16. Buck Converter with Adjustable Soft Start
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L1* 6.8H
VSW FB VC CC 1.5nF R1 5.36k R2 4.99k
OUTPUT 5V
+
+
GND
C3 10F 25V CERAMIC
C1** 100F 10V TANT
D1
C4** 4.7F * L1 IS A SINGLE CORE WITH TWO WINDINGS BH ELECTRONICS #501-0726 ** TOKIN IE475ZY5U-C304 IF LOAD CAN GO TO ZERO, AN OPTIONAL PRELOAD OF 1k TO 5k MAY BE USED TO IMPROVE LOAD REGULATION D1, D3: MBRD340
+
L1*
C5** 100F 10V TANT
+
OUTPUT -5V
D3
1506 F17
Figure 17. Dual Output SEPIC Converter
23
LT1506
PACKAGE DESCRIPTION
0.256 (6.502)
0.060 (1.524)
0.060 (1.524)
0.183 (4.648)
0.075 (1.905) 0.300 (7.620) BOTTOM VIEW OF DD PAK HATCHED AREA IS SOLDER PLATED COPPER HEAT SINK +0.012 0.143 -0.020 0.040 - 0.060 (1.016 - 1.524) 0.026 - 0.036 (0.660 - 0.914) 0.013 - 0.023 (0.330 - 0.584)
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP
0.016 - 0.050 0.406 - 1.270
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER LT1074/LT1076 LTC 1148 LTC1149 LTC1174 LT1176 LT1370 LT1371 LT1372/LT1377 LT1374 LT1435/LT1436
(R)
DESCRIPTION Step-Down Switching Regulators High Efficiency Synchronous Step-Down Switching Regulator High Efficiency Synchronous Step-Down Switching Regulator High Efficiency Step-Down and Inverting DC/DC Converter Step-Down Switching Regulator High Efficiency DC/DC Converter High Efficiency DC/DC Converter 500kHz and 1MHz High Efficiency 1.5A Switching Regulators High Efficiency Step-Down Switching Regulator High Efficiency Step-Down Converter
Burst Mode is a trademark of Linear Technology Corporation.
24
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
U
Dimensions in inches (millimeters) unless otherwise noted. R Package 7-Lead Plastic DD Pak
(LTC DWG # 05-08-1462)
0.060 (1.524) TYP 0.390 - 0.415 (9.906 - 10.541) 15 TYP 0.059 (1.499) TYP
0.165 - 0.180 (4.191 - 4.572)
0.045 - 0.055 (1.143 - 1.397) +0.008 0.004 -0.004
0.330 - 0.370 (8.382 - 9.398)
(
+0.203 0.102 -0.102
)
0.095 - 0.115 (2.413 - 2.921) 0.050 0.012 (1.270 0.305)
(
+0.305 3.632 -0.508
)
R (DD7) 0396
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 0.053 - 0.069 (1.346 - 1.752) 0.004 - 0.010 (0.101 - 0.254) 8 7 6 5
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
SO8 0996
1
2
3
4
COMMENTS 40V Input, 100kHz, 5A and 2A External FET Switches External FET Switches 0.5A, 150kHz Burst ModeTM Operation PDIP LT1076 42V, 6A, 500kHz Switch 35V, 3A, 500kHz Switch Boost Topology 25V, 4.5A, 500kHz Switch External Switches, Low Noise
1506i LT/TP 0698 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1998

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